Semiconductor memory

The present invention relates to a semiconductor memory using two transistors, which is formed by two well-integrated transistors. That is, a write element (vertical transistor) is stacked on another transistor as a read transistor (formed on a substrate using the lower electrode of the vertical tra...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: KATAYAMA, KOZO, HISAMOTO, DAI
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:The present invention relates to a semiconductor memory using two transistors, which is formed by two well-integrated transistors. That is, a write element (vertical transistor) is stacked on another transistor as a read transistor (formed on a substrate using the lower electrode of the vertical transistor as its gate) and the two transistors are formed by field-effect transistors having opposite conductivity types. Thereby complimentary operations of memory cells are allowed, resulting in a highly integrated semiconductor memory having good memory characteristics.