Single source differential circuit

A circuit for supplying a reference voltage from a single data input voltage source is provided which utilizes a delay circuit in conjunction with a source follower circuit to provide a separate reference voltage to a differential circuit. The data input signal is provided concurrently to the source follower circuit and the delay. The source follower circuit includes an ""N"" type transistor which has its source connected to the source of a ""P"" type transistor. The delay circuit is provided to delay, or ""hold off"" the data input signal until the signal is through the source follower and ready for input to the differential circuit. By using the delay, the data input signal and the reference signal (output from the source follower) are input to the differential circuit simultaneously. The threshold voltage drop across the gate and source of the transistors in the source follower circuit provide the reference voltage, which follows the data input voltage. In this manner, hysterisis induced by the source follower circuit provides a reference voltage which can be used by a differential circuit, or the like and eliminate the need for two separate and distinct power supplies.