Method and apparatus for single clocked, non-overlapping access in a multi-port memory cell
The data processing system of the present invention implements a multi-port memory cell and control therefor. In response to a single clock signal, the cell is accessed during multiple, non-concurrent intervals during a single clock cycle. Each of the accesses during the clock cycle are over a diffe...
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| Format: | Patent |
| Sprache: | eng |
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| Zusammenfassung: | The data processing system of the present invention implements a multi-port memory cell and control therefor. In response to a single clock signal, the cell is accessed during multiple, non-concurrent intervals during a single clock cycle. Each of the accesses during the clock cycle are over a different line. |
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