Central processing unit having an extension instruction

A central processing unit having an extension instruction comprises a memory address, an offset and a fixed length instruction of varying immediate data. The central processing unit comprises a general register, a special register, a register file constituted as an inner register, a function block for executing the calculation function; an instruction register for memorizing the instruction, a control block for generating/outputting a control signal to the instruction register and a plurality of status flags, in which the special register enables a programmer to be accessed thereto and includes only an extension data field for memorizing extension data or an extension register having the extension data field as one element and an extension flag for changing its status when the instruction memorizing the extension data in the extension register is executed and having one or a plurality of bits that a programmer is accessible.