Method for metal etching with reduced sidewall build up during integrated circuit manufacturing

A method in a plasma processing chamber for etching through a selected portion of a layer stack. The layer stack comprises a metallization layer, a first barrier layer disposed adjacent to the metallization layer, and a photoresist layer disposed above the metallization layer. The method includes et...

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Bibliographische Detailangaben

Hauptverfasser:	NAEEM,MUNIR D, GREWAL, VIRINDER, BURNS, STUART M, GRECO, NANCY, GRECO, STEVE
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS CHEMICAL SURFACE TREATMENT CHEMISTRY COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL COATING MATERIAL WITH METALLIC MATERIAL COATING METALLIC MATERIAL DIFFUSION TREATMENT OF METALLIC MATERIAL ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL METALLURGY MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLICMATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASSC23 AND AT LEAST ONEPROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25 NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE SEMICONDUCTOR DEVICES
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