Arrangement and method relating to digital information
The present invention relates to a logic circuit arrangement comprising signal input means and signal output means 1,2 (respectively) and a number of SFQ circuits comprising Josephson junctions wherein carrier means are used for carrying digital information. SFQ circuits comprising Josephson junctio...
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| Format: | Patent |
| Sprache: | chi ; eng |
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| Zusammenfassung: | The present invention relates to a logic circuit arrangement comprising signal input means and signal output means 1,2 (respectively) and a number of SFQ circuits comprising Josephson junctions wherein carrier means are used for carrying digital information. SFQ circuits comprising Josephson junctions are sampled at the input/output for producing DC voltages and a train comprising at least two single flux quanta is used as carrier means for information and phase locking between at least two Josephson junctions is used to provide at least two different dynamic states of which at least one provides an output signal. |
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