Semiconductor structure and fabricating method thereof

A method comprises bonding a first wafer with a second wafer through wafer-on-wafer bonding, wherein the second wafer includes a first plurality of device dies therein. A second plurality of device dies are bonded on the second wafer through chip-on-wafer bonding. A gap-filling process is performed...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: CHUNG, MING-TSU, LIN, YUNGI
Format: Patent
Sprache:chi ; eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator CHUNG, MING-TSU
LIN, YUNGI
description A method comprises bonding a first wafer with a second wafer through wafer-on-wafer bonding, wherein the second wafer includes a first plurality of device dies therein. A second plurality of device dies are bonded on the second wafer through chip-on-wafer bonding. A gap-filling process is performed to fill the gaps between the second plurality of device dies with gap-filling regions. The gap-filling regions and the second plurality of device dies collectively form a reconstructed wafer.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_TW202439632A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>TW202439632A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_TW202439632A3</originalsourceid><addsrcrecordid>eNrjZDALTs3NTM7PSylNLskvUiguKQIySotSFRLzUhTSEpOKMpMTSzLz0hVyU0sy8lMUSjJSi1Lz03gYWNMSc4pTeaE0N4Oim2uIs4duakF-fGpxQWJyal5qSXxIuJGBkYmxpZmxkaMxMWoA8HQuWg</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor structure and fabricating method thereof</title><source>esp@cenet</source><creator>CHUNG, MING-TSU ; LIN, YUNGI</creator><creatorcontrib>CHUNG, MING-TSU ; LIN, YUNGI</creatorcontrib><description>A method comprises bonding a first wafer with a second wafer through wafer-on-wafer bonding, wherein the second wafer includes a first plurality of device dies therein. A second plurality of device dies are bonded on the second wafer through chip-on-wafer bonding. A gap-filling process is performed to fill the gaps between the second plurality of device dies with gap-filling regions. The gap-filling regions and the second plurality of device dies collectively form a reconstructed wafer.</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20241001&amp;DB=EPODOC&amp;CC=TW&amp;NR=202439632A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20241001&amp;DB=EPODOC&amp;CC=TW&amp;NR=202439632A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>CHUNG, MING-TSU</creatorcontrib><creatorcontrib>LIN, YUNGI</creatorcontrib><title>Semiconductor structure and fabricating method thereof</title><description>A method comprises bonding a first wafer with a second wafer through wafer-on-wafer bonding, wherein the second wafer includes a first plurality of device dies therein. A second plurality of device dies are bonded on the second wafer through chip-on-wafer bonding. A gap-filling process is performed to fill the gaps between the second plurality of device dies with gap-filling regions. The gap-filling regions and the second plurality of device dies collectively form a reconstructed wafer.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDALTs3NTM7PSylNLskvUiguKQIySotSFRLzUhTSEpOKMpMTSzLz0hVyU0sy8lMUSjJSi1Lz03gYWNMSc4pTeaE0N4Oim2uIs4duakF-fGpxQWJyal5qSXxIuJGBkYmxpZmxkaMxMWoA8HQuWg</recordid><startdate>20241001</startdate><enddate>20241001</enddate><creator>CHUNG, MING-TSU</creator><creator>LIN, YUNGI</creator><scope>EVB</scope></search><sort><creationdate>20241001</creationdate><title>Semiconductor structure and fabricating method thereof</title><author>CHUNG, MING-TSU ; LIN, YUNGI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_TW202439632A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2024</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>CHUNG, MING-TSU</creatorcontrib><creatorcontrib>LIN, YUNGI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CHUNG, MING-TSU</au><au>LIN, YUNGI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor structure and fabricating method thereof</title><date>2024-10-01</date><risdate>2024</risdate><abstract>A method comprises bonding a first wafer with a second wafer through wafer-on-wafer bonding, wherein the second wafer includes a first plurality of device dies therein. A second plurality of device dies are bonded on the second wafer through chip-on-wafer bonding. A gap-filling process is performed to fill the gaps between the second plurality of device dies with gap-filling regions. The gap-filling regions and the second plurality of device dies collectively form a reconstructed wafer.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language chi ; eng
recordid cdi_epo_espacenet_TW202439632A
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Semiconductor structure and fabricating method thereof
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-06T21%3A28%3A05IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=CHUNG,%20MING-TSU&rft.date=2024-10-01&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ETW202439632A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true