Semiconductor structure and fabricating method thereof
A method comprises bonding a first wafer with a second wafer through wafer-on-wafer bonding, wherein the second wafer includes a first plurality of device dies therein. A second plurality of device dies are bonded on the second wafer through chip-on-wafer bonding. A gap-filling process is performed...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | A method comprises bonding a first wafer with a second wafer through wafer-on-wafer bonding, wherein the second wafer includes a first plurality of device dies therein. A second plurality of device dies are bonded on the second wafer through chip-on-wafer bonding. A gap-filling process is performed to fill the gaps between the second plurality of device dies with gap-filling regions. The gap-filling regions and the second plurality of device dies collectively form a reconstructed wafer. |
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