Semiconductor memory device

The embodiment of the invention provides a highly reliable semiconductor memory device without worsening the voltage controllability of a word line. A semiconductor memory device according to one embodiment of the present invention includes: a plurality of conductive layers stacked in a first direction at intervals; and a contact plug connected to a first conductive layer, which is one of the plurality of conductive layers. The first conductive layer has: a first portion; a second portion spaced apart from the first portion in a second direction orthogonal to the first direction; and a third portion located between the first portion and the second portion. The semiconductor memory device includes a third region including the third portion and a plurality of third pillars extending in the first direction in the third portion and having an insulating material. The third region includes a fourth region and a fifth region. The third portion connects the first portion and the second portion in the fourth region. T