Method for forming an patterned insulating layer and semiconductor device
The present invention provides a method for forming an insulating film pattern, comprising the steps of: providing a substrate including two or more different types dielectric film areas; selectively forming a barrier film on the substrate so as to include an a first area in which a barrier film is...
Gespeichert in:
Hauptverfasser: | , , , , , , , , |
---|---|
Format: | Patent |
Sprache: | chi ; eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | KIM, JUN-YOUNG KIM, HWAN-SOO BOK, CHEOL-KYU LEE, JAE-WOO KIM, PIL-SOO SIM, JANG-KEUN LEE, HAN-JIN YEO, SO-JEONG LEE, GYEONG-A |
description | The present invention provides a method for forming an insulating film pattern, comprising the steps of: providing a substrate including two or more different types dielectric film areas; selectively forming a barrier film on the substrate so as to include an a first area in which a barrier film is formed and a second area in which a barrier film is not formed or a barrier film is relatively less formed; selectively forming an insulating film on the second area; and etching a portion of the upper part of the insulating film. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_TW202436659A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>TW202436659A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_TW202436659A3</originalsourceid><addsrcrecordid>eNrjZPD0TS3JyE9RSMsvAuHczLx0hcQ8hYLEkpLUorzUFIXMvOLSnMQSkHhOYmVqEVA2RaE4NTczOT8vpTS5BKgvJbUsMzmVh4E1LTGnOJUXSnMzKLq5hjh76KYW5MenFhckJqfmpZbEh4QbGRiZGJuZmVo6GhOjBgAHVDU7</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method for forming an patterned insulating layer and semiconductor device</title><source>esp@cenet</source><creator>KIM, JUN-YOUNG ; KIM, HWAN-SOO ; BOK, CHEOL-KYU ; LEE, JAE-WOO ; KIM, PIL-SOO ; SIM, JANG-KEUN ; LEE, HAN-JIN ; YEO, SO-JEONG ; LEE, GYEONG-A</creator><creatorcontrib>KIM, JUN-YOUNG ; KIM, HWAN-SOO ; BOK, CHEOL-KYU ; LEE, JAE-WOO ; KIM, PIL-SOO ; SIM, JANG-KEUN ; LEE, HAN-JIN ; YEO, SO-JEONG ; LEE, GYEONG-A</creatorcontrib><description>The present invention provides a method for forming an insulating film pattern, comprising the steps of: providing a substrate including two or more different types dielectric film areas; selectively forming a barrier film on the substrate so as to include an a first area in which a barrier film is formed and a second area in which a barrier film is not formed or a barrier film is relatively less formed; selectively forming an insulating film on the second area; and etching a portion of the upper part of the insulating film.</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; CHEMICAL SURFACE TREATMENT ; CHEMISTRY ; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL ; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL ; COATING MATERIAL WITH METALLIC MATERIAL ; COATING METALLIC MATERIAL ; DIFFUSION TREATMENT OF METALLIC MATERIAL ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL ; METALLURGY ; SEMICONDUCTOR DEVICES ; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240916&DB=EPODOC&CC=TW&NR=202436659A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,778,883,25551,76304</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240916&DB=EPODOC&CC=TW&NR=202436659A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KIM, JUN-YOUNG</creatorcontrib><creatorcontrib>KIM, HWAN-SOO</creatorcontrib><creatorcontrib>BOK, CHEOL-KYU</creatorcontrib><creatorcontrib>LEE, JAE-WOO</creatorcontrib><creatorcontrib>KIM, PIL-SOO</creatorcontrib><creatorcontrib>SIM, JANG-KEUN</creatorcontrib><creatorcontrib>LEE, HAN-JIN</creatorcontrib><creatorcontrib>YEO, SO-JEONG</creatorcontrib><creatorcontrib>LEE, GYEONG-A</creatorcontrib><title>Method for forming an patterned insulating layer and semiconductor device</title><description>The present invention provides a method for forming an insulating film pattern, comprising the steps of: providing a substrate including two or more different types dielectric film areas; selectively forming a barrier film on the substrate so as to include an a first area in which a barrier film is formed and a second area in which a barrier film is not formed or a barrier film is relatively less formed; selectively forming an insulating film on the second area; and etching a portion of the upper part of the insulating film.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CHEMICAL SURFACE TREATMENT</subject><subject>CHEMISTRY</subject><subject>COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL</subject><subject>COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL</subject><subject>COATING MATERIAL WITH METALLIC MATERIAL</subject><subject>COATING METALLIC MATERIAL</subject><subject>DIFFUSION TREATMENT OF METALLIC MATERIAL</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL</subject><subject>METALLURGY</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZPD0TS3JyE9RSMsvAuHczLx0hcQ8hYLEkpLUorzUFIXMvOLSnMQSkHhOYmVqEVA2RaE4NTczOT8vpTS5BKgvJbUsMzmVh4E1LTGnOJUXSnMzKLq5hjh76KYW5MenFhckJqfmpZbEh4QbGRiZGJuZmVo6GhOjBgAHVDU7</recordid><startdate>20240916</startdate><enddate>20240916</enddate><creator>KIM, JUN-YOUNG</creator><creator>KIM, HWAN-SOO</creator><creator>BOK, CHEOL-KYU</creator><creator>LEE, JAE-WOO</creator><creator>KIM, PIL-SOO</creator><creator>SIM, JANG-KEUN</creator><creator>LEE, HAN-JIN</creator><creator>YEO, SO-JEONG</creator><creator>LEE, GYEONG-A</creator><scope>EVB</scope></search><sort><creationdate>20240916</creationdate><title>Method for forming an patterned insulating layer and semiconductor device</title><author>KIM, JUN-YOUNG ; KIM, HWAN-SOO ; BOK, CHEOL-KYU ; LEE, JAE-WOO ; KIM, PIL-SOO ; SIM, JANG-KEUN ; LEE, HAN-JIN ; YEO, SO-JEONG ; LEE, GYEONG-A</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_TW202436659A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2024</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CHEMICAL SURFACE TREATMENT</topic><topic>CHEMISTRY</topic><topic>COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL</topic><topic>COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL</topic><topic>COATING MATERIAL WITH METALLIC MATERIAL</topic><topic>COATING METALLIC MATERIAL</topic><topic>DIFFUSION TREATMENT OF METALLIC MATERIAL</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL</topic><topic>METALLURGY</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION</topic><toplevel>online_resources</toplevel><creatorcontrib>KIM, JUN-YOUNG</creatorcontrib><creatorcontrib>KIM, HWAN-SOO</creatorcontrib><creatorcontrib>BOK, CHEOL-KYU</creatorcontrib><creatorcontrib>LEE, JAE-WOO</creatorcontrib><creatorcontrib>KIM, PIL-SOO</creatorcontrib><creatorcontrib>SIM, JANG-KEUN</creatorcontrib><creatorcontrib>LEE, HAN-JIN</creatorcontrib><creatorcontrib>YEO, SO-JEONG</creatorcontrib><creatorcontrib>LEE, GYEONG-A</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>KIM, JUN-YOUNG</au><au>KIM, HWAN-SOO</au><au>BOK, CHEOL-KYU</au><au>LEE, JAE-WOO</au><au>KIM, PIL-SOO</au><au>SIM, JANG-KEUN</au><au>LEE, HAN-JIN</au><au>YEO, SO-JEONG</au><au>LEE, GYEONG-A</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method for forming an patterned insulating layer and semiconductor device</title><date>2024-09-16</date><risdate>2024</risdate><abstract>The present invention provides a method for forming an insulating film pattern, comprising the steps of: providing a substrate including two or more different types dielectric film areas; selectively forming a barrier film on the substrate so as to include an a first area in which a barrier film is formed and a second area in which a barrier film is not formed or a barrier film is relatively less formed; selectively forming an insulating film on the second area; and etching a portion of the upper part of the insulating film.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | chi ; eng |
recordid | cdi_epo_espacenet_TW202436659A |
source | esp@cenet |
subjects | BASIC ELECTRIC ELEMENTS CHEMICAL SURFACE TREATMENT CHEMISTRY COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL COATING MATERIAL WITH METALLIC MATERIAL COATING METALLIC MATERIAL DIFFUSION TREATMENT OF METALLIC MATERIAL ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL METALLURGY SEMICONDUCTOR DEVICES SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION |
title | Method for forming an patterned insulating layer and semiconductor device |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-15T12%3A53%3A53IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=KIM,%20JUN-YOUNG&rft.date=2024-09-16&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ETW202436659A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |