3D dynamic random access memory (DRAM) and methods for fabricating 3D-DRAM

A three-dimensional (3D) dynamic random-access memory (DRAM) includes a substrate and a plurality of nanosheet transistors stacked vertically on a surface of the substrate. Each of the nanosheet transistors comprises a gate, a source, and a drain. A plurality of bitlines is connected to corresponding ones of the drains of the nanosheet transistors on one side of the plurality of nanosheet transistors. A plurality of capacitors is stacked vertically on the substrate, extend parallel to a surface of the substrate, and are connected to corresponding ones of the sources on an opposite side of the plurality of nanosheet transistors.