Timing controller for minimizing power consumption during blank period

The present invention proposes a timing controller capable of minimizing power consumption during a blank period by disabling the operation of a corresponding functional block or a memory device included in the corresponding block during the blank period. The timing controller comprises: a blank period detection circuit for generating a blank period detection signal by using a clock signal and a gate driving signal; and a functional block group comprising a plurality of functional blocks carrying out operations in accordance with a display period and a blank period in response to the gate driving signal, a data driving signal, and the blank period detection signal.