Package carrier and manufacturing method thereof and chip package structure

A package carrier includes a redistribution layer, a plurality of first conductive pillars and a molding compound board. The redistribution layer has a first surface and a second surface opposite to each other, and includes a plurality of redistribution circuits, a plurality of conductive vias, a plurality of dielectric layers and a plurality of output pads. The conductive vais are aligned with the first surface, and the output pads protrude from the second surface. The first conductive pillars are disposed within the molding compound board and aligned with the first surface of the redistribution layer and also electrically connected to a portion of the conductive vais. The molding compound board is adjacent to the first surface of the redistribution layer and the middle region of the molding compound has a recess. The recess exposes the first conductive pillars. The thickness of the edge region of the molding compound board provides the mechanical stability for the redistribution layer attached to it for all