Layout pattern of semiconductor unit and forming method thereof

Layout pattern of semiconductor unit and forming method thereof

The invention provides a layout pattern of a semiconductor unit, which comprises a substrate with a first L-shaped MESA region and a second L-shaped MESA region, wherein the shapes of the first L-shaped MESA region and the second L-shaped MESA region are mutually inverted by 180 degrees, a first hig...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: CHEN, PENG-HSIU, HUNG, CHING-WEN, LIN, CHUN-HSIEN, HSIEH, SU-MING
Format: Patent
Sprache:chi ; eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
PHYSICS
SEMICONDUCTOR DEVICES
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:The invention provides a layout pattern of a semiconductor unit, which comprises a substrate with a first L-shaped MESA region and a second L-shaped MESA region, wherein the shapes of the first L-shaped MESA region and the second L-shaped MESA region are mutually inverted by 180 degrees, a first high electron mobility transistor (HEMT) and a second high electron mobility transistor are located on the first L-shaped MESA region, and a third high electron mobility transistor and a fourth high electron mobility transistor are located on the second L-shaped MESA region.