Power management based on limiting hardware-forced power control

Power management based on limiting hardware-forced power control

Various techniques and circuit implementations for power reduction management in integrated circuits are disclosed. Specifically, a power manager circuit in an integrated circuit (e.g., a system on a chip) may modify power budgets for various components in the integrated circuit to reduce the amount...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: WULCAN, KARL DANIEL, SODHI, INDER M, KUZI, TAL, ZAHIR, ACHMED R, RAJWAN, DORON
Format: Patent
Sprache:chi ; eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:Various techniques and circuit implementations for power reduction management in integrated circuits are disclosed. Specifically, a power manager circuit in an integrated circuit (e.g., a system on a chip) may modify power budgets for various components in the integrated circuit to reduce the amount of power control caused by external signaling that indicates a voltage regulator overload (e.g., a voltage droop).