Gate driving apparatus

A gate driving apparatus includes a plurality of shift register circuits. In the shift register circuit, an output stage circuit receives the first and second control signals, and provides a gate high voltage or a reference low voltage to charge and discharge an output terminal according to the first and second control signals to generate a gate drive signal. A first voltage regulator provides the gate high voltage or a gate low voltage to a first control terminal and a second control terminal according to a first clock signal, a second clock signal and a front-stage gate driving signal to adjust the first control signal and the second control signal. A second voltage regulator adjusts the first control signal according to a post-stage gate driving signal, the first clock signal and the second clock signal. A voltage level of the reference low voltage is relatively lower than the voltage levels of the gate high voltage and the gate low voltage.