Intra-bonding semiconductor integrated circuit chips

Techniques are provided for intra-bonding multiple semiconductor integrated circuit chips to form multi-chip package structures. For example, a device comprises a first semiconductor die and a second semiconductor die. The first semiconductor die comprises a first overlap region which comprises a first array of metallic contacts. The second semiconductor die comprises a second overlap region which comprises a second array of metallic contacts. The first overlap region and the second overlap region are overlapped and bonded together with the first array of metallic contacts aligned to the second array of metallic contacts, and with the first semiconductor die and the second semiconductor die disposed laterally adjacent to each other.