Handling method of wafer back-end process and wafer-level semiconductor structure

A handling method of a wafer back-end process includes the following steps. A wafer including a front side and a back side is provided, where a plurality of semiconductor elements is formed between the front side and the back side of the wafer, an interconnection layer is formed on these semiconduct...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	YU, HSIU-MEI, LIN, BING-YU, CHEN, TUNG-MING, LIN, CHANG-SHENG, LI, CHIHUNG, HSIEH, CHENG-YI
Format:	Patent
Sprache:	chi ; eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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