Multi-state one-time programmable memory circuit

The invention provides a multi-state one-time programmable memory circuit, which includes a memory cell and a program voltage driving circuit. The memory cell includes a MOS storage transistor, a first MOS access transistor and a second MOS access transistor electrically connected to store two bits of data. When the memory cell is in a write state, the program voltage driving circuit outputs a write control potential to the gate of the MOS storage transistor, and when the memory cell is in a read state, the program voltage driving circuit outputs a read control potential to the gate of the MOS storage transistor.