Integrated circuit layout and method for generating the same

Integrated circuit layout and method for generating the same

Systems and methods for an integrated circuit layout are disclosed. The integrated circuit layout includes a first block including multiple first cells, each of which has a first cell height, and a second block including multiple second cells, each of which has a second cell height. The first block...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: YEN, PO-HSIEN, ZHUANG, HUI-ZHONG, GAO, JIA-HONG, YANG, JUNGAN
Format: Patent
Sprache:chi ; eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:Systems and methods for an integrated circuit layout are disclosed. The integrated circuit layout includes a first block including multiple first cells, each of which has a first cell height, and a second block including multiple second cells, each of which has a second cell height. The first block is disposed next to the second block with a spacing that is either equal to zero or less than any of the first or second cell heights.