Access optimized partial cache collapse

Aspects of the present disclosure relate to systems and methods for improving performance of a partial cache collapse by a processing device. Certain embodiments provide a method for performing a partial cache collapse procedure, the method including : counting, in each cache way of a group of cache...

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Bibliographische Detailangaben
Hauptverfasser: NAGILLA, SHARATH KUMAR, LEPAKSHA, HITHESH HASSAN, DESAI, NIRAV NARENDRA, NANDANWAR, DARSHAN KUMAR, DEVARASETTY, VENKATA BISWANATH
Format: Patent
Sprache:chi ; eng
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Zusammenfassung:Aspects of the present disclosure relate to systems and methods for improving performance of a partial cache collapse by a processing device. Certain embodiments provide a method for performing a partial cache collapse procedure, the method including : counting, in each cache way of a group of cache ways, a number of dirty cache lines having dirty bits indicating the cache line has been modified; selecting, from the group, at least one cache way for collapse, based on its corresponding number of dirty cache lines; and performing the partial cache collapse procedure based on the at least one cache way selected from the group for collapse.