Integrated chip

The present disclosure relates to an integrated chip including a semiconductor device substrate and a plurality of semiconductor devices arranged along the semiconductor device substrate. A micro-electromechanical system (MEMS) layer overlies the semiconductor device substrate. The MEMS layer includes a first moveable mass and a second moveable mass. A capping layer overlies the MEMS layer. The capping layer has a first lower surface directly over the first moveable mass and a second lower surface directly over the second moveable mass. An outgas layer is on the first lower surface and directly between the first pair of sidewalls. A lower surface of the outgas layer delimits a first cavity in which the first moveable mass is arranged. The second lower surface of the capping layer delimits a second cavity in which the second moveable mass is arranged.