Method and apparatus for testing package-on-package semiconductor devices characterized by having the effects of improving reliability, lowering cost, greatly increasing testing efficiency and testing accuracy
The present invention relates to an apparatus for testing package-on-package semiconductor devices, which mainly includes a picking-up device, a testing seat, an upper-layered chip seat and a main controller. When the first package component is to be tested and after the main controller controls the...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The present invention relates to an apparatus for testing package-on-package semiconductor devices, which mainly includes a picking-up device, a testing seat, an upper-layered chip seat and a main controller. When the first package component is to be tested and after the main controller controls the picking-up device to load the first package component on the testing seat, the main controller controls the picking device to move and load the upper-layered chip seat to electrically contact the first package component on the testing seat, so as to allow the second package component in the upper-layered chip seat to be electrically connected to the first package component and perform a test. Accordingly, the upper-layered chip seat provided by the present invention is an independent part. When testing is to be performed, the picking-up device moves and loads the upper-layered chip seat onto the testing seat, so as to allow the second package component to be electrically connected to the first package component, t |
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