Memory device and memory control method
A memory device according to one aspect of the present disclosure comprises a nonvolatile memory cell array unit, and a memory controller that controls a writing operation and reading operation with respect to the nonvolatile memory cell array unit. The memory controller controls a refreshing operat...
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| Format: | Patent |
| Sprache: | chi ; eng |
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| Zusammenfassung: | A memory device according to one aspect of the present disclosure comprises a nonvolatile memory cell array unit, and a memory controller that controls a writing operation and reading operation with respect to the nonvolatile memory cell array unit. The memory controller controls a refreshing operation with respect to the nonvolatile memory cell array unit by using at least one of the writing operation and the reading operation. The memory controller also sets a cycle for the refreshing operation on the basis of at least one of the number of occurrences writing to and the number of occurrences reading from the nonvolatile memory cell array unit. |
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