Memory device

In general, according to one embodiment, a memory device includes: a first and a second chip that are in contact with each other on a first surface divided into a first region, a second region surrounding the first region, and a third region surrounding the second region. The first chip includes: a substrate including a first diffusion region of a first conductivity type and a second diffusion region of a second conductivity type; a first electrode unit including a continuous conductor surrounding the first region; and a second electrode unit surrounding the first region while being spaced from the first electrode unit. The second chip includes: a first interconnect layer; a third electrode unit including a continuous conductor surrounding the first region and being in contact with the first electrode unit; a fourth electrode unit surrounding the first region while being spaced from the third electrode unit and being in contact with the second electrode unit; a first wall unit being in contact with the first