Signal conversion circuit

The present disclosure provides a signal conversion circuit including a phase interpolator and a bias voltage generating circuit. The phase interpolator is configured to convert input clock signals into an output clock signal according to a digital signal. The bias voltage generating circuit is elec...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: YEH, CHIEN-TSU, HSIEH, YIUN, LIU, HSI-EN
Format: Patent
Sprache:chi ; eng
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Beschreibung
Zusammenfassung:The present disclosure provides a signal conversion circuit including a phase interpolator and a bias voltage generating circuit. The phase interpolator is configured to convert input clock signals into an output clock signal according to a digital signal. The bias voltage generating circuit is electrically coupled to the phase interpolator, is configured to generate a bias voltage according to reference information, and is configured to output the bias voltage to the phase interpolator, so that the output clock signal has a predetermined phase corresponding to one of multiple bit configurations of the digital signal, in which the reference information is related to a change of the phase interpolator due to the temperature variation.