Methods of micro-via formation for advanced packaging

Methods of micro-via formation for advanced packaging

The present disclosure relates to micro-via structures for interconnects in advanced wafer level semiconductor packaging. The methods described herein enable the formation of high-quality, low-aspect-ratio micro-via structures with improved uniformity, thus facilitating thin and small-form-factor se...

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Bibliographische Detailangaben
Hauptverfasser: PARK, GI-BACK, LESCHKIES, KURTIS, CHEN, HAN-WEN, GOUK, ROMAN, VERHAVERBEKE, STEVEN, LEI, WEI-SHENG, CHO, KYU-IL, CHAKRABORTY, TAPASH
Format: Patent
Sprache:chi ; eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:The present disclosure relates to micro-via structures for interconnects in advanced wafer level semiconductor packaging. The methods described herein enable the formation of high-quality, low-aspect-ratio micro-via structures with improved uniformity, thus facilitating thin and small-form-factor semiconductor devices having high I/O density with improved bandwidth and power.