Semiconductor memory device having a dummy gate electrode arranged between the first gate electrode and the second gate electrode

A semiconductor memory device according to this invention includes: a substrate; a plurality of gate electrodes; a semiconductor layer facing the gate electrodes; a charge accumulation layer arranged between the gate electrodes and the semiconductor layer; a conductive layer connected to one end of...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	ISHIYAMA, YU, SUZUKI, SHINJI, SHIINO, YASUHIRO, NISHIKAWA, KOTA, SAKANIWA, MANABU
Format:	Patent
Sprache:	chi ; eng
Schlagworte:	INFORMATION STORAGE PHYSICS STATIC STORES
Online-Zugang:	Volltext bestellen
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