System-on-chip, a method for the same, and a computing device
Systems and techniques are described for implementing testing-and-manufacturing keys for a system-on-chip (SoC). A hardware test portion of the SoC is configured to exercise features of domains that process data being communicated across the fabrics during an externally initiated test. In response t...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | Systems and techniques are described for implementing testing-and-manufacturing keys for a system-on-chip (SoC). A hardware test portion of the SoC is configured to exercise features of domains that process data being communicated across the fabrics during an externally initiated test. In response to receiving a testing-and-manufacturing token from an external test system, a testing-and-manufacturing key support component of the SoC generates a testing-and-manufacturing key. The hardware test portion is configured to execute a test function to promote security of the SoC, however, only in response to the testing-and-manufacturing security component authenticating the testing-and-manufacturing key. Through implementing testing-and-manufacturing keys this way, the system-on-chip secures access to potentially sensitive functions and secrets, while allowing their unencumbered and authorized access for testing the system-on-chip during various life cycle states. |
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