Semiconductor structure and forming method thereof

A semiconductor structure includes a substrate, a gate, a bit line, a capping layer, a first spacer, an insulated layer, a second spacer and a spin-coating dielectric layer. The gate and the bit line is located on the substrate. The gate is located between the substrate and the bit line. The capping layer is located on the bit line. The first spacer is located on a sidewall of the gate, a sidewall of the bit line and a sidewall of the capping layer. The insulated layer is located on an upper portion of the first spacer. The second spacer is located under a bottom surface of the insulated layer and extends downwardly. The insulated layer, the first spacer and the second spacer defines an air gap. The spin-coating dielectric layer is among the first spacer, the air gap and the second spacer. The spin-coating dielectric layer is lower than a bottom surface of the bit line.