Integrated circuit structure and manufacturing method thereof

A method of manufacturing an integrated circuit structure includes depositing a dielectric cap over a gate structure. A source/drain contact is formed over a source/drain region after forming the dielectric cap. A top of the dielectric cap is doped to form a doped region in the dielectric cap. After doping the top of the dielectric cap, a etch stop layer and an interlayer dielectric (ILD) layer are deposited over the dielectric cap. A via opening is formed to extend though the ILD layer and the etch stop layer to expose the source/drain contact. A source/drain via is filled in the via opening.