Memory device and manufacturing method thereof

A memory device and a method for manufacturing memory device including steps below are provided. A plurality of stack structures including a tunnel oxide layer and a floating gate are formed on a substrate. A liner material layer including a nitride linear layer is formed on the substrate. A top surface of the nitride linear layer is lower than a top surface of the floating gate and is higher than a top surface of the tunnel oxide layer. An insulation material layer covering the liner material layer is formed on the substrate. The insulation material layer is underwent an oxidation process and a portion of the insulation material layer is removed to form an insulation structure. An inter-poly dielectric layer covering the plurality of stack structures and the insulation structure is formed on the substrate. A control gate covering the inter-poly dielectric layer is formed on the substrate.