Resistive random-access memory circuit

A resistive random-access memory circuit includes a switching transistor and a variable resistance element. The switching transistor has a first end coupled to a source line, a second end coupled to the external power line, and a control end coupled to a word line. The variable resistance element has a first end coupled to the second end of the switch transistor and a second end coupled to a bit line. When the set current of the variable resistance element is higher than a maximum providing current of the switching transistor, the external power line is coupled to an external power supply circuit when the variable resistance element is set; when the reset current of the variable resistance element is higher than the maximum providing current of the switching transistor, the external power line is coupled to the external power supply circuit when the variable resistance element is reset.