Package structure and method for fabricating the same

Package structure and method for fabricating the same

A package structure includes a substrate, a first capacitor, a System on Chip unit and a wiring layer. The first capacitor is provided on the substrate. The System on Chip unit is bonded with the first capacitor in a first dielectric layer. The wiring layer is configured to electrically couple the f...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: LIN, SHIAU-SHI, WANG, LIANGNG
Format: Patent
Sprache:chi ; eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:A package structure includes a substrate, a first capacitor, a System on Chip unit and a wiring layer. The first capacitor is provided on the substrate. The System on Chip unit is bonded with the first capacitor in a first dielectric layer. The wiring layer is configured to electrically couple the first capacitor and the System on Chip unit. The wiring layer is provided on the first dielectric layer through a second dielectric layer.