Double data rate memory

Double data rate memory

The present disclosure relates to a double data rate memory including a circuit board, a gold finger connector, at least 16 first IC chips, at least 16 second IC chips, a first read-only memory and a second read-only memory. The circuit board has a first surface, a second surface, a first region and...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: WU, YUNGIH, LIN, RUING
Format: Patent
Sprache:chi ; eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
INFORMATION STORAGE
PHYSICS
SEMICONDUCTOR DEVICES
STATIC STORES
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Beschreibung
Zusammenfassung:The present disclosure relates to a double data rate memory including a circuit board, a gold finger connector, at least 16 first IC chips, at least 16 second IC chips, a first read-only memory and a second read-only memory. The circuit board has a first surface, a second surface, a first region and a second region. The gold finger connector, which has a plurality of pins, is disposed on the first region. The first IC chips are disposed on the first surface. The second IC chips are disposed on the second surface. Tens pins of the plurality of pins are electrically connected with the second read-only memory and the first IC chips and the second IC chips disposed on the second region, so that the first IC chips and the second IC chips disposed on the second region are operated. Therefore, at least 32 IC chips can be effectively operated in single one memory.