Semiconductor memory device including a first word line, a second word line, a memory post MH, a bit line BL, and a driver

One embodiment of the present invention provides a semiconductor memory device capable of improving the reliability of a write operation. The semiconductor memory device according to the embodiment includes: a first word line, which is disposed above a semiconductor substrate 30; a second word line laminated on the first word line via an insulation layer; a memory post MH, which passes through the first word line and the second word line, and is provided with a lower post LMH above the semiconductor substrate 30, an upper post UMH above the lower post LMH, and a junction part JT between the lower post LMH and the upper post UMH; a bit line BL, which is electrically connected to the memory post MH; and a driver 13, which applies a voltage to the first and second word lines. The first word line is closer to the junction part than the second word line, so that the voltage of the bit line BL is boosted in a precharge operation, and the driver 13 applies a voltage VCP1 to the second word line, and applies a voltag