Controller circuit and methods for estimating transmission delays
A control circuit includes a first signal processing device, a second signal processing device, a data bus and a confirm signal line. The first signal processing device processes signals in accordance with a first predetermined rule. The second signal processing device processes signals in accordanc...
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| Format: | Patent |
| Sprache: | chi ; eng |
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| Zusammenfassung: | A control circuit includes a first signal processing device, a second signal processing device, a data bus and a confirm signal line. The first signal processing device processes signals in accordance with a first predetermined rule. The second signal processing device processes signals in accordance with a second predetermined rule. The data bus is coupled between the first signal processing device and the second signal processing device and includes multiple data lines. The confirm signal line is coupled between the first signal processing device and the second signal processing device. The first signal processing device transmits at least one synchronization signal to the second signal processing device via the data bus. The second signal processing device estimates transmission delay on each data line according to the at least one synchronization signal, performs transmission delay compensation on each data line according to the estimated transmission delay and transmits a confirmation signal on the confi |
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