Method for polishing a semiconductor wafer on both sides
Method for polishing a semiconductor wafer on both sides, polishing pads of a Shore A hardness at room temperature of at least 80 and having a compressibility at room temperature of less than 3% being attached to upper and lower polishing plates, a semiconductor wafer being polished on both sides be...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | Method for polishing a semiconductor wafer on both sides, polishing pads of a Shore A hardness at room temperature of at least 80 and having a compressibility at room temperature of less than 3% being attached to upper and lower polishing plates, a semiconductor wafer being polished on both sides between upper and lower polishing pads, characterized in that the polishing pads are attached to the upper and lower polishing plate by bonding the polishing pads to the upper and lower polishing plate, by positioning a pad having a compressibility at room temperature of at least 3% between the two bonded polishing pads as intermediate layer and by then pressing together the two polishing pads with the pad situated therebetween for a certain period of time. |
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