Interconnect structure for semiconductor devices with multiple power rails and redundancy
An interconnect structure for semiconductor devices includes first and second (or more) metallization layers, each having power rail(s), with a direct electrical connection between vertically adjacent power rail(s).
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creator | NARASIMHA, SHREESH JUSTISON, PATRICK RYAN BOUCHE, GUILLAUME KIM, BYOUNG-YOUP CHILD JR., CRAIG MICHAEL STEPHENS, JASON EUGENE |
description | An interconnect structure for semiconductor devices includes first and second (or more) metallization layers, each having power rail(s), with a direct electrical connection between vertically adjacent power rail(s). |
format | Patent |
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language | chi ; eng |
recordid | cdi_epo_espacenet_TW201810427A |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Interconnect structure for semiconductor devices with multiple power rails and redundancy |
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