Interconnect structure for semiconductor devices with multiple power rails and redundancy
An interconnect structure for semiconductor devices includes first and second (or more) metallization layers, each having power rail(s), with a direct electrical connection between vertically adjacent power rail(s).
Gespeichert in:
Hauptverfasser: | , , , , , |
---|---|
Format: | Patent |
Sprache: | chi ; eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | An interconnect structure for semiconductor devices includes first and second (or more) metallization layers, each having power rail(s), with a direct electrical connection between vertically adjacent power rail(s). |
---|