Contacting SOI substrates

An integrated circuit is provided including a semiconductor bulk substrate, a buried oxide layer formed on the semiconductor bulk substrate, a plurality of cells, each cell having a transistor device, formed over the buried oxide layer, a plurality of gate electrode lines running through the cells a...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: JAIN, NAVNEET, LORENZ, INGOLF, HENSEL, ULRICH, ZIER, MICHAEL, HAUFE, CHRISTIAN
Format: Patent
Sprache:chi ; eng
Schlagworte:
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Beschreibung
Zusammenfassung:An integrated circuit is provided including a semiconductor bulk substrate, a buried oxide layer formed on the semiconductor bulk substrate, a plurality of cells, each cell having a transistor device, formed over the buried oxide layer, a plurality of gate electrode lines running through the cells and providing gate electrodes for the transistor devices of the cells, and a plurality of tap cells configured for electrically contacting the semiconductor bulk substrate and arranged at positions different from positions below or above the plurality of cells having the transistor devices.