Semiconductor package and manufacturing method thereof and substrate and packaged structure

A manufacturing method of a semiconductor package is comprising: stacking a second substrate on a first substrate by plurality support element, wherein the second substrate has at least a through cleaning via, and performing a operation of cleaning the support element and cleaning the space between...

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Bibliographische Detailangaben
Hauptverfasser:	WANG, LUNG-YUAN, CHIANG, CHENGIA, SHIH, CHIA-KAI, HSU, CHUI
Format:	Patent
Sprache:	chi ; eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS SEMICONDUCTOR DEVICES TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION TECHNICAL SUBJECTS COVERED BY FORMER USPC TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Beschreibung
Zusammenfassung:	A manufacturing method of a semiconductor package is comprising: stacking a second substrate on a first substrate by plurality support element, wherein the second substrate has at least a through cleaning via, and performing a operation of cleaning the support element and cleaning the space between the second substrate and the first substrate by using of the cleaning via. The invention further provides the semiconductor package, a substrate, and a packaged structure.