Semiconductor assembly structure and semiconductor process

Semiconductor assembly structure and semiconductor process

The present invention relates to a semiconductor package structure and semiconductor process. The semiconductor package includes a first substrate, a second substrate, a die, a plurality of interconnection elements and an encapsulation material. The interconnection elements connect the first substra...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: YEH, YUNG-YI, CHEN, YIN-FA, PI, TUNING, YANG, PING-FENG, YEH, CHANG-LIN, HSIAO, YU-HSIANG
Format: Patent
Sprache:chi ; eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:The present invention relates to a semiconductor package structure and semiconductor process. The semiconductor package includes a first substrate, a second substrate, a die, a plurality of interconnection elements and an encapsulation material. The interconnection elements connect the first substrate and the second substrate. The encapsulation material covers the interconnection elements, wherein the adhesion force between the encapsulation material and the first substrate is substantially the same with that between the encapsulation material and the second substrate. Whereby, the second substrate will not warp during the reflow process.