Stackable interposers
A stackable interposer is provided. The stackable interposer includes a substrate, a plurality of deep-trench vias, a metal interconnection layer, an inter-metal dielectric, an optional passivation layer, a first dielectric layer, a plurality of first under-bump metal pads, a plurality of first stac...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | A stackable interposer is provided. The stackable interposer includes a substrate, a plurality of deep-trench vias, a metal interconnection layer, an inter-metal dielectric, an optional passivation layer, a first dielectric layer, a plurality of first under-bump metal pads, a plurality of first stacking bumps, a plurality of first stacking bumps, a second dielectric layer, a plurality of second UBM pads, and a plurality of second stacking bumps. The plurality of deep-trench vias (DTVs) formed in said substrate; the optional first dielectric layer surrounding said deep-trench vias; the plurality of first stacking bumps formed on said first under-bump metal; the optional second dielectric layer formed on the second side of said substrate; and the plurality of second stacking bumps formed on said second UBM for integrating different functions and materials chip. |
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