Semiconductor package structure and manufacturing method thereof
Semiconductor package structure including a carrier, a chip, a plurality of bonding wires and a molding compound is provided. The carrier has a die pad and a plurality of leads disposed around the die pad. The chip is disposed on the die pad of the carrier. The bonding wires are disposed between the...
Gespeichert in:
Hauptverfasser: | , , |
---|---|
Format: | Patent |
Sprache: | chi ; eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | Semiconductor package structure including a carrier, a chip, a plurality of bonding wires and a molding compound is provided. The carrier has a die pad and a plurality of leads disposed around the die pad. The chip is disposed on the die pad of the carrier. The bonding wires are disposed between the chip and the leads. The molding compound encapsulates the chip, the bonding wires and a portion of the leads. The molding compound has an upper surface and a lower surface opposite to each other and a side surface connecting the upper surface and the lower surface. An included angle between the side surface and the surface normal of the lower surface is more than 0 degree. |
---|