Process for semiconductor device

A process for semiconductor device is provided. A planar layer is formed on a topographic surface. A hard mask layer is formed on the planar layer. A photoresist layer is formed on the hard mask layer. The hard mask layer is difference form the planar layer and the photoresist layer. An exposure and development processes are performed on the photoresist layer so that a first opening exposing the hard mask layer is formed. The hard mask layer exposed by the first opening and the underlay planar layer are etched so as to form a second opening. An ion implantation is performed using the planar layer the hard mask layer to form a doped region in a substrate under the topographic surface at the bottom of the second opening. The hard mask layer and the planar layer are removed to expose the topographic surface.