Adaptive address translation method for high bandwidth and low IR concurrently and memory controller using the same

An adaptive memory address translation method includes following steps. Multiple request instructions are received, and each request instruction corresponds to a memory address including a bank address. The memory addresses corresponding to the request instructions are translated, such that at least part of the bank addresses of the neighboring request instructions are different. A numerical translation is utilized to translate the memory addresses corresponding to the request instructions, such that the memory addresses of the neighboring request instructions have less different bits.