Method of suppressing noise of inverter
A method of suppressing noise of inverter, wherein two pulse-width modulation signals are respectively inputted to the upper and lower arm logic transistors of the inverter in an interlaced manner every half cycle. Amplitude of each pulse-width modulation signal at N phase angles in a single cycle i...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | A method of suppressing noise of inverter, wherein two pulse-width modulation signals are respectively inputted to the upper and lower arm logic transistors of the inverter in an interlaced manner every half cycle. Amplitude of each pulse-width modulation signal at N phase angles in a single cycle is zero. These phase angles are symmetrized with pairs at an opposite phase direction by taking (pi) / 2 as the center. Accordingly, multiple odd harmonics starting from the lower harmonics in the output waveform of the inverter can be eliminated such that audio frequency noise is not generated while operating the inverter. |
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