IO circuit calibration method and related apparatus

IO circuit calibration method and apparatus are provided for calibrating a driving impedance at an output end of an IO circuit in a chip. The chip further includes a plurality of basic impedances and a non-volatile memory. The IO circuit calibration method includes: measuring an impedance value of o...

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Bibliographische Detailangaben
Hauptverfasser:	TYAN, EER-WEN, YEH, MINGIEH
Format:	Patent
Sprache:	chi ; eng
Schlagworte:	ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS TESTING TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Beschreibung
Zusammenfassung:	IO circuit calibration method and apparatus are provided for calibrating a driving impedance at an output end of an IO circuit in a chip. The chip further includes a plurality of basic impedances and a non-volatile memory. The IO circuit calibration method includes: measuring an impedance value of one basic impedance and recording the measured result in the non-volatile memory; conducting at least one basic impedance to provide a calibration impedance formed by the conducted basic impedance(s); adjusting the number of the conducted basic impedance(s) in the calibration impedance and estimating an impedance value of the driving impedance according to the measured result and a voltage divided by the calibration impedance and the driving impedance at the output end.