Semiconcductor package and manufacturing method thereof and encapsulating method thereof
A semiconcductor package and a manufacturing method thereof and an encapsulating method thereof are provided. The semiconcductor package includes a substrate, a flip chip, a plurality of conductive parts and a sealant. The substrate has an upper surface. The flip chip has an active surface and a chi...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | A semiconcductor package and a manufacturing method thereof and an encapsulating method thereof are provided. The semiconcductor package includes a substrate, a flip chip, a plurality of conductive parts and a sealant. The substrate has an upper surface. The flip chip has an active surface and a chip surface opposite to the active surface. The conductive parts electrically connect the upper surface and the active surface. The sealant covers the flip chip, and the space between the upper surface and the active surface is filled with portion of the sealant. The sealant has top surface is spaced apart from the chip surface by a first distance, and the upper surface is spaced apart from the active surface by a second distance. The ratio of the first distance to the second distance is from two to five. |
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